Multi-gigabit transmitters are widely used in today's serial links, such as with Serial Advanced Technology Attachment (SATA) and Peripheral Component Interconnect Express (PCIe) communication links. Two classes of such types of transmitters are commonly used: Current Mode Driver (CMD)-based and Voltage Mode Driver (VMD)-based transmitters. One reason for using a VMD-based transmitter versus a CMD-based transmitter is the smaller amount of current needed to produce the same voltage amplitude across a termination resistor Rrx at a receiver. The smaller amount of current translates into lower power consumption at the VMD-based transmitter.
A disadvantage of a VMD-based transmitter for some serial link families is the single-ended maximum output voltage level that is achievable, which is generally limited to half the power supply (½*VCC). In the majority of high speed serial links, the signal is transmitted in a differential manner—this condition translates to a theoretical maximum peak-to-peak differential output amplitude voltage of VCC. This reduced voltage level may become a limiting factor in a situation where the signal is transmitted through a transmission channel that introduces high losses and/or distortion.
Nowadays, high-speed transmitters utilize equalization techniques to compensate for the high losses and frequency domain characteristic of a transmission channel. The equalization compensates for degradation and distortion of the signal as it travels through the transmission channel, such that the receiver is able to receive a sufficiently usable signal. In order to produce equalized signals, various techniques can be used in the analog domain as well as the digital domain.
One of the most power-efficient of such techniques is to use a digital-to-analog converter (DAC) to produce the various output voltage levels required to equalize a signal. Source-series terminated (SST) transmitters are a commonly used example of a VMD-based transmitter that can achieve lower power consumption relative to a CMD-based transmitter.
An SST transmitter typically includes two circuit branches (each having resistors R1 and R2) coupled to VCC and through which the signal is transmitted in a differential manner as part of the DAC process. A disadvantage of this implementation is that there are always currents flowing in the two circuit branches from VCC to ground, regardless of the output voltage produced. Using an N-bit DAC, the lower the output voltage produced, the higher the current lost in the two branches. For example, to produce a ½*VCC output voltage level, the values of the resistors in the two branches may be R1=50 ohms and R2=infinity/high, thereby resulting in a current of 5 mA assuming the receiver's termination resistor Rrx=100 ohms and VCC=1V. Producing instead a significantly lower output voltage of 1/31*VCC, for example, involves R1=1550/16 ohms and R2=1550/15, such that R1//R2=100 ohms. However, this reduced value of output voltage translates to a higher total current consumption of 9.579 mA.
Accordingly, it is therefore evident that the current consumption corresponding to an equalized output voltage has an inverse relationship to the amplitude of the output voltage. The lesser the amplitude of the output voltage, the higher the amount of current needed to produce the output voltage. This higher current disadvantageously results in increased power consumption, especially in applications that typically involve lower voltages.